"Whither Advanced GPU Research in HPC? Where We Are, Where We Are Going" presented by Shuaiwen Song, Pacific Northwest National Laboratory
Future large-scale high performance supercomputer systems require exceptional performance and energy efficiency to achieve exaflops computational power and beyond. To facilitate this effort, various kinds of accelerators have been added into top HPC systems due to their superior performance and power efficiency. Among them, the most typical and widely-adopted ones are GPUs. Major vendors like NVIDIA have recently proposed architectures for exascale acceleration requirement and even super machine learning nodes for big-data analytics (e.g., DGX-1). In this talk, I carefully sample several mini research topics related to advanced GPU research that I have been working on in the past year and half. They represent a range of high-interest GPU research topics including big graph analytics, approximate computing, emerging memory techniques on GPU, and software-architecture co-design. I hope these topics will invoke interesting conversations on future GPU research and eventually help us tackle various bottlenecks of the upcoming exascale era.
Dr. Shuaiwen Leon Song is currently a senior staff scientist of High Performance Computing group at Pacific Northwest National Lab (PNNL). He graduated with a Ph.D. from Computer Science department at Virginia Tech in May 2013. Before joining PNNL HPC group, he has worked with several government and industrial labs including Center for Advanced Computing (CASC) at Lawrence Livermore National Lab (LLNL), Performance Analysis Lab (PAL) at Pacific Northwest National Lab (PNNL), and the Architecture Research Division at NEC Research American at Princeton. He was a 2011 Livermore ISCR scholar, recipient of 2011 Paul E. Torgersen Excellent research award, 2016 PNNL PCSD outstanding performance, two SC best paper nomination and HiPEAC paper award. He currently leads two DOE Lab Directed Research and Development (LDRD) projects. He has published in the major HPC-related conferences including ASPLOS, MICRO, HPCA, PACT, HPDC, ICS, SC and IPDPS, etc. He serves as organizing committee or PC member for several major HPC venues including ASPLOS, SC, ICS, IPDPS and HPDC. His past and current research are funded by several major U.S. agencies. Additionally, he has on-going collaboration with major U.S. Universities and industry labs such as Intel research Lab and NVIDIA research. He is a 2011 Livermore ISCR scholar, recipient of 2011 Paul E. Torgersen Excellent research award, 2016 PNNL PCSD outstanding performance award, two SC best paper nomination, a HiPEAC paper award, and the recipient of IEEE TCHPC early career award in high performance computing.
Friday, September 22, 2017 at 2:30pm to 3:30pm
McAdams Hall, 119
821 McMillan Rd., Clemson, SC 29634, USA